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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9136269 B1

PDFFull Text
Expired
Date of Patent:
Sep. 15, 2015

Filed:

Oct. 28, 2014

Semiconductor device and method of manufacturing the same

Applicant:

SK Hynix Inc., Gyeonggi-do, KR;

Inventors:

Jung Ryul Ahn, Gyeonggi-do, KR;

Yun Kyoung Lee, Seoul, KR;

Assignee:

SK Hynix Inc., Gyeonggi-do, KR;

Attorney:

IP & T Group LLP

Primary Examiner:

Tan N Tran

Assistant Examiner:

Fazli Erdem

Int. Cl.
CPC ...
H01L 27/108 (2006.01); H01L 21/02 (2006.01); H01L 29/92 (2006.01); H01L 23/522 (2006.01); H01L 27/105 (2006.01); H01L 49/02 (2006.01); H01L 21/28 (2006.01);
U.S. Cl.
CPC ...
H01L 27/10844 (2013.01); H01L 21/28008 (2013.01); H01L 23/5223 (2013.01); H01L 27/105 (2013.01); H01L 28/60 (2013.01); H01L 28/90 (2013.01);
Abstract

A semiconductor device includes a semiconductor substrate divided into a cell region and a peripheral circuit region defined in a first direction, wherein the peripheral circuit region is divided into a first region and a second region defined in a second direction substantially orthogonal to the first direction; gate lines formed over the semiconductor substrate in the cell region and arranged in the second direction; and a capacitor including lower electrodes over the semiconductor substrate, a dielectric layer and an upper electrode, wherein the lower electrodes in the first and second regions, separated from each other in the first direction and coupled to each other in the first region, the dielectric layer is formed along surfaces of the lower electrodes in the second region, and the upper electrode is formed over the dielectric layer.

Find Patent Forward Citations

Ahn, Jung. (2015). Semiconductor device and method of manufacturing the same (U.S. Patent No. 9136269). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9136269

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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