The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9136222 B1

PDF
Full Text
Expired
Date of Patent:
Sep. 15, 2015

Filed:

May. 11, 2012
Applicants:

Yoba Amoah, Fairfax, VT (US);

John J. Ellis-monaghan, Grand Isle, VT (US);

Roger C. Kuo, South Burlington, VT (US);

Molly J. Leitch, Nashville, TN (US);

Zhihong Zhang, Chandler, AZ (US);

Inventors:

Yoba Amoah, Fairfax, VT (US);

John J. Ellis-Monaghan, Grand Isle, VT (US);

Roger C. Kuo, South Burlington, VT (US);

Molly J. Leitch, Nashville, TN (US);

Zhihong Zhang, Chandler, AZ (US);

Assignee:

GLOBALFOUNDRIES, Inc., Grand Cayman, KY;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/312 (2006.01); H01L 23/544 (2006.01); H01L 27/08 (2006.01);
U.S. Cl.
CPC ...
H01L 23/544 (2013.01); H01L 27/08 (2013.01); H01L 2223/5444 (2013.01); H01L 2223/5446 (2013.01); H01L 2223/54473 (2013.01);
Abstract

Various embodiments disclosed include methods of performing a double exposure process on a level of an integrated circuit (IC) chip to form an IC chip having an embedded electrically measurable identifier. In some cases, the method includes: exposing a level of an integrated circuit (IC) chip using a first mask orientation; subsequently exposing the level of the IC chip using a second mask orientation distinct from the first mask orientation; and developing the level of the IC chip to form an electrically measurable identifier on the IC chip.


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