The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 15, 2015

Filed:

Sep. 10, 2012
Applicant:

Kenta Uchiyama, Nagano, JP;

Inventor:

Kenta Uchiyama, Nagano, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 23/538 (2006.01); H01L 21/56 (2006.01); H01L 25/03 (2006.01); H01L 25/065 (2006.01); H01L 21/683 (2006.01); H01L 23/498 (2006.01); H01L 23/31 (2006.01); H01L 23/00 (2006.01); H05K 1/18 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5389 (2013.01); H01L 21/568 (2013.01); H01L 21/6835 (2013.01); H01L 23/49822 (2013.01); H01L 24/24 (2013.01); H01L 25/03 (2013.01); H01L 25/0657 (2013.01); H01L 23/3121 (2013.01); H01L 24/16 (2013.01); H01L 24/32 (2013.01); H01L 2221/68345 (2013.01); H01L 2221/68381 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/04105 (2013.01); H01L 2224/0557 (2013.01); H01L 2224/13111 (2013.01); H01L 2224/13116 (2013.01); H01L 2224/16145 (2013.01); H01L 2224/16146 (2013.01); H01L 2224/16237 (2013.01); H01L 2224/24246 (2013.01); H01L 2224/2919 (2013.01); H01L 2224/2929 (2013.01); H01L 2224/29339 (2013.01); H01L 2224/29344 (2013.01); H01L 2224/29355 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/48227 (2013.01); H01L 2224/48228 (2013.01); H01L 2224/73204 (2013.01); H01L 2224/73265 (2013.01); H01L 2224/73267 (2013.01); H01L 2224/81191 (2013.01); H01L 2224/82203 (2013.01); H01L 2224/83192 (2013.01); H01L 2224/83851 (2013.01); H01L 2224/83856 (2013.01); H01L 2224/83862 (2013.01); H01L 2225/06524 (2013.01); H01L 2924/00014 (2013.01); H01L 2924/18162 (2013.01); H05K 1/185 (2013.01);
Abstract

A semiconductor package includes a first semiconductor chip including a target circuit surface and a side surface, a first sealing insulating layer including a first surface positioned toward the target circuit surface and configured to seal the target circuit surface and the side surface, at least one wiring layer formed on the first surface of the first sealing insulating layer, at least one insulating layer formed on the at least one wiring layer, a second semiconductor chip mounted on the at least one insulating layer, and a second sealing insulating layer formed on the at least one insulating layer and configured to seal the second semiconductor chip.


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