The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 08, 2015

Filed:

May. 01, 2014
Applicant:

Lsi Corporation, San Jose, CA (US);

Inventors:

Chaitanya Palusa, Fremont, CA (US);

Volodymyr Shvydun, Los Altos, CA (US);

Hiep T. Pham, San Jose, CA (US);

Adam B. Healey, Newburyport, MA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04B 1/38 (2015.01); H04L 25/03 (2006.01);
U.S. Cl.
CPC ...
H04L 25/03949 (2013.01);
Abstract

An interleaved track-and-hold front-end with multiphase clocks computes and propagates unrolled decision feedback equalization results along a pipeline with the final outputs selected from one of the interleaved previous output bits with a multiplexer operating over multiple unit intervals instead of one unit interval. An n-way interleaved serializer/deserializer utilizes an n unit interval multiplexer or n one unit interval multiplexers. Pipelined decision feedback equalization allows multiple, slower multiplexers.


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