The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 08, 2015

Filed:

Sep. 25, 2014
Applicant:

Sanken Electric Co., Ltd., Niiza-shi, Saitama, JP;

Inventors:

Hiroko Kawaguchi, Niiza, JP;

Hiromichi Kumakura, Niiza, JP;

Satoru Washiya, Niiza, JP;

Toru Yoshie, Niiza, JP;

Assignee:

Sanken Electric Co., LTD., Niiza-shi, Saitama, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/095 (2006.01); H01L 29/47 (2006.01); H01L 29/812 (2006.01); H01L 31/07 (2012.01); H01L 31/108 (2006.01); H01L 29/872 (2006.01); H01L 29/45 (2006.01); H01L 21/283 (2006.01); H01L 29/16 (2006.01);
U.S. Cl.
CPC ...
H01L 29/872 (2013.01); H01L 21/283 (2013.01); H01L 29/45 (2013.01); H01L 29/47 (2013.01); H01L 29/1608 (2013.01);
Abstract

A semiconductor device having a main electrode connected to a first semiconductor region and a second semiconductor layer on a semiconductor substrate so that a pn-junction diode is formed with the first semiconductor region being interposed and a Schottky barrier diode is formed with the second semiconductor layer being interposed on a surface of the semiconductor substrate, the semiconductor device includes a first electrode configured to ohmic-contact the first semiconductor region; a second electrode configured to Schottky-contact the second semiconductor layer and not having a portion directly contacting the first electrode; and a conductive reaction suppression layer to suppress a reaction between a material configuring the first electrode and a material configuring the second electrode are provided on the surface of the semiconductor substrate, and the main electrode is electrically connected to the first electrode and the second electrode.


Find Patent Forward Citations

Loading…