The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 01, 2015

Filed:

Jan. 17, 2014
Applicant:

Kandou Labs, S.a., Lausanne, CH;

Inventors:

John Fox, Kislingbury, GB;

Brian Holden, Monte Sereno, CA (US);

Peter Hunt, Northampton, GB;

John D. Keay, Bedford, GB;

Amin Shokrollahi, Preverenges, CH;

Richard Simpson, Bedford, GB;

Anant Singh, Pully, CH;

Andrew Kevin John Stewart, Astcote, GB;

Giuseppe Surace, Northampton, GB;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 5/16 (2006.01); H03M 5/20 (2006.01); H04L 29/06 (2006.01); H04L 25/49 (2006.01);
U.S. Cl.
CPC ...
H04L 69/04 (2013.01); H03M 5/16 (2013.01); H03M 5/20 (2013.01); H04L 25/4917 (2013.01); Y02B 60/1228 (2013.01); Y02B 60/1235 (2013.01);
Abstract

Systems and methods are described for transmitting data over physical channels to provide a high speed, low latency interface such as between a memory controller and memory devices with significantly reduced or eliminated Simultaneous Switching Output noise. Controller-side and memory-side embodiments of such channel interfaces are disclosed which do not require additional pin count or data transfer cycles, have low power utilization, and introduce minimal additional latency. In some embodiments of the invention, three or more voltage levels are used for signaling.


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