The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 01, 2015
Filed:
Sep. 24, 2014
Intel Corporation, Santa Clara, CA (US);
Su Wei Lim, Klang, MY;
Ronald W. Swartz, Granite Bay, CA (US);
Yueming Jiang, Rancho Cordova, CA (US);
Hooi Kar Loo, Bayan Lepas, MY;
Athourina Gevergiz, San Jose, CA (US);
Bruce A. Tennant, Hillsboro, OR (US);
Yick Yaw Ho, Folsom, CA (US);
Poh Thiam Teoh, Seri Damansara, MY;
Jennifer Chin, Sungai Ara, MY;
Hui Shi, San Jose, CA (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
Techniques for embedded high speed serial interface methods are described herein. The techniques provide an apparatus for link equalization including an equalization control module to determine at least a first coefficient setting and a second coefficient setting at a remote transmitter based on an algorithm. The apparatus also includes a receiver margining module to determine a first margin value to be associated with the first coefficient setting and a second margin value to be associated with the second coefficient setting. The receiver margining module is to further determine if at least the first margin value is higher than the second margin value.