The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 01, 2015

Filed:

Nov. 13, 2013
Applicant:

Power Integrations, Inc., San Jose, CA (US);

Inventors:

Stefan Baurle, San Jose, CA (US);

Guangchao Darson Zhang, San Jose, CA (US);

Arthur B. Odell, Morgan Hill, CA (US);

Mingming Mao, Saratoga, CA (US);

Michael Yue Zhang, Mountain View, CA (US);

Edward Deng, Los Altos, CA (US);

Assignee:

Power Integrations, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H02M 3/335 (2006.01); H02H 7/122 (2006.01); H02M 1/00 (2007.01); H02M 7/757 (2006.01); H02M 1/12 (2006.01);
U.S. Cl.
CPC ...
H02M 3/33507 (2013.01); H02M 1/12 (2013.01);
Abstract

A controller includes a PWM circuit and a timing circuit. The PWM circuit controls a switch in response to a clock signal. A switching period of the clock signal is based on a charging and discharging time of a capacitor included in the timing circuit. Both first and second current sinks discharge the capacitor while the timing circuit is in a normal discharging mode that is when an on time of the switch is less than a threshold time. The second current sink is prevented from discharging the capacitor such that the capacitor is discharged with the first current sink and not the second current sink while the timing circuit is in an alternative discharging mode that is when the on time of the switch exceeds the threshold time. The discharging of the capacitor in the alternative discharging mode increases the switching period of the clock signal.


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