The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 01, 2015

Filed:

Jul. 21, 2014
Applicant:

Avalanche Technology, Inc., Fremont, CA (US);

Inventors:

Kimihiro Satoh, Fremont, CA (US);

Bing K Yen, Cupertino, CA (US);

Dong Ha Jung, Pleasanton, CA (US);

Yiming Huai, Pleasanton, CA (US);

Assignee:

Avalanche Technology, Inc., Fremont, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/00 (2006.01); H01L 27/108 (2006.01); H01L 27/06 (2006.01); H01L 27/24 (2006.01); H01L 45/00 (2006.01); H01L 27/02 (2006.01); H01L 27/115 (2006.01);
U.S. Cl.
CPC ...
H01L 27/10805 (2013.01); H01L 27/0688 (2013.01); H01L 27/2436 (2013.01); H01L 45/12 (2013.01); H01L 45/141 (2013.01); H01L 27/0207 (2013.01); H01L 27/11519 (2013.01); H01L 27/11565 (2013.01);
Abstract

The present invention is directed to a semiconductor memory device including a plurality of first level contacts arranged in an array with every third row vacant along a first direction, thereby forming multiple contact regions separated by multiple vacant regions along the first direction with each of the multiple contact regions including a first row and a second row of the first level contacts extending along a second direction; a first and second plurality of second level contacts formed on top of the first level contacts with the second plurality of second level contacts having elongated shape extending into the vacant regions adjacent thereto; and a first and second plurality of memory elements formed on top of the first and second plurality of second level contacts, respectively, thereby permitting the memory elements to have greater center-to-center distance between two closest neighbors than the first level contacts.


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