The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 01, 2015
Filed:
Nov. 22, 2013
Cadence Design Systems, Inc., San Jose, CA (US);
Serena Chiang Caluya, Pleasanton, CA (US);
Li-Chien Ting, Mountain View, CA (US);
Cadence Design Systems, Inc., San Jose, CA (US);
Abstract
A system, method, and computer program product for using continuous parameter value updates to rapidly evaluate parameterized cells in a design tool. Embodiments display parameters and corresponding parameter values of parameterized cells in a circuit design in a GUI, adjust parameter values according to user input, evaluate the parameterized cell, and present results of the evaluating in the GUI during the displaying. Parameters influence circuit layout, circuit schematics, or simulation settings. Parameter values include current, minimum, maximum, and increment values. Parameterized cells may be individual cell instances, submaster cells, or master cells. Embodiments integrate validation tools and detect design rule check violations, assertion violations, invalid parameter values, and evaluation errors, and responsively generate user error alerts and selectively disallow further adjusting. Embodiments generate test circuits, each using a parameter value from a permutation of the adjusted parameter values.