The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 25, 2015

Filed:

Aug. 28, 2014
Applicant:

United Microelectronics Corp., Hsin-Chu, TW;

Inventors:

Lung-En Kuo, Tainan, TW;

Po-Wen Su, Kaohsiung, TW;

Chen-Yi Weng, New Taipei, TW;

Hsuan-Hsu Chen, Tainan, TW;

Assignee:

UNITED MICROELECTRONICS CORP., Science-Based Industrial Park, Hsin-Chu, TW;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 21/762 (2006.01); H01L 29/66 (2006.01); H01L 27/088 (2006.01); H01L 29/06 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7851 (2013.01); H01L 21/76224 (2013.01); H01L 27/0886 (2013.01); H01L 29/0649 (2013.01); H01L 29/66795 (2013.01); H01L 29/7853 (2013.01);
Abstract

A method of forming a fin structure is provided. First, a substrate is provided, wherein a first region, a second region encompassing the first region, and a third region encompassing the second region are defined on the substrate. Then, a plurality of first trenches having a first depth are formed in the first region and the second region, wherein each two first trenches defines a first fin structure. The first fin structure in the second region is removed. Lastly, the first trenches are deepened to form a plurality of second trenches having a second depth, wherein each two second trenches define a second fin structure. The present invention further provides a structure of a non-planar transistor.


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