The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 25, 2015
Filed:
Oct. 19, 2007
Fu-tien Weng, Hsinchu, TW;
Yung-shun Liao, Yunlin, TW;
Yi-chuan Lo, Hsinchu, TW;
Bii-cheng Chang, Hsinchu, TW;
Fu-Tien Weng, Hsinchu, TW;
Yung-Shun Liao, Yunlin, TW;
Yi-Chuan Lo, Hsinchu, TW;
Bii-Cheng Chang, Hsinchu, TW;
VisEra TECHNOLOGIES COMPANY LIMITED, Hsinchu Science Park, TW;
Abstract
An exemplary wafer level package comprises a semiconductor wafer with a plurality of semiconductor chips of perfect polygonal shapes thereon. A circuit-free area is defined over the semiconductor wafer to electrically isolate the semiconductor chips. A dam structure is substantially formed over the circuit-free area, wherein a portion of the dam structure formed around an edge of the semiconductor wafer is formed with a plurality via holes therein. A transparent substrate is formed over the semiconductor wafer, defining a plurality of cavities between the semiconductor chips and the transparent substrate, wherein the transparent substrate is supported by the dam structure.