The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 18, 2015

Filed:

Nov. 28, 2012
Applicant:

Industrial Technology Research Institute, Hsinchu, TW;

Inventors:

Wei-Hung Kuo, Hsinchu, TW;

Suh-Fang Lin, Hsinchu, TW;

Rong Xuan, New Taipei, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/15 (2006.01); H01L 29/66 (2006.01); H01L 31/06 (2012.01); H01L 21/336 (2006.01); H01L 29/20 (2006.01); H01L 29/778 (2006.01); H01L 21/28 (2006.01); H01L 29/423 (2006.01); H01L 29/43 (2006.01); H01L 29/45 (2006.01); H01L 29/10 (2006.01);
U.S. Cl.
CPC ...
H01L 29/2003 (2013.01); H01L 21/28264 (2013.01); H01L 29/42316 (2013.01); H01L 29/432 (2013.01); H01L 29/778 (2013.01); H01L 29/7786 (2013.01); H01L 29/1066 (2013.01); H01L 29/452 (2013.01);
Abstract

Provided is an enhancement mode GaN-based transistor device including an epitaxial stacked layer disposed on a substrate; a source layer and a drain layer disposed on a surface of the epitaxial stacked layer; a p-type metal oxide layer disposed between the source layer and the drain layer; and a gate layer disposed on the p-type metal oxide layer. Besides, the p-type metal oxide layer includes a body part disposed on the surface of the epitaxial stacked layer, and a plurality of extension parts connecting the body part and extending into the epitaxial stacked layer. With such structure, the enhancement mode GaN-based transistor device can effectively suppress generation of the gate leakage current.


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