The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 11, 2015

Filed:

Nov. 01, 2007
Applicants:

Andrew Duller, Bristol, GB;

Gajinder Singh Panesar, Bristol, GB;

Peter Claydon, Bath, GB;

William Robbins, Bristol, GB;

Andrew Kuligowski, Bath, GB;

Olfat Younis, Bath, GB;

Inventors:

Andrew Duller, Bristol, GB;

Gajinder Singh Panesar, Bristol, GB;

Peter Claydon, Bath, GB;

William Robbins, Bristol, GB;

Andrew Kuligowski, Bath, GB;

Olfat Younis, Bath, GB;

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 7/38 (2006.01); G06F 9/38 (2006.01); G06F 9/30 (2006.01);
U.S. Cl.
CPC ...
G06F 9/3885 (2013.01); G06F 9/30149 (2013.01); G06F 9/3853 (2013.01); G06F 9/3891 (2013.01);
Abstract

A LIW processor comprises multiple execution units. The multiple execution units of the processor are divided into groups, and an input instruction word can contain instructions for one execution unit in each of the groups. The processor is optimized for use in signal processing operations, in that the multiple execution units of the processor are divided into groups which do not place significant restrictions on the desirable uses of the processor, because it has been determined that, in signal processing applications, it is not usually necessary for certain execution units to operate simultaneously. These execution units can therefore be grouped together, in such a way that only one of them can operate at a particular time, without significantly impacting on the operation of the device. An array is formed from multiple interconnected processors of this type.


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