The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 04, 2015
Filed:
Nov. 14, 2013
Applicant:
Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;
Inventors:
Chih-Fu Chang, Pingtung County, TW;
Jen-Pan Wang, Tainan, TW;
Assignee:
Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/44 (2006.01); H01L 29/45 (2006.01); H01L 21/3205 (2006.01); H01L 21/321 (2006.01); H01L 21/3213 (2006.01); H01L 21/324 (2006.01); H01L 21/02 (2006.01);
U.S. Cl.
CPC ...
H01L 29/456 (2013.01); H01L 21/0262 (2013.01); H01L 21/02532 (2013.01); H01L 21/324 (2013.01); H01L 21/3212 (2013.01); H01L 21/32051 (2013.01); H01L 21/32053 (2013.01); H01L 21/32133 (2013.01);
Abstract
A semiconductor device includes a substrate, an epi-layer, an etch stop layer, an interlayer dielectric (ILD) layer, a silicide layer cap and a contact plug. The substrate has a first portion and a second portion neighboring to the first portion. The etch stop layer is disposed on the second portion. The ILD layer is disposed on the etch stop layer. The silicide cap is disposed on the epi-layer. The contact plug is disposed on the silicide cap and surrounded by the ILD layer.