The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 04, 2015

Filed:

Aug. 15, 2014
Applicant:

Powertech Technology Inc., Hsinchu, TW;

Inventor:

Shou-Chian Hsu, Hsinchu, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 23/52 (2006.01); H01L 29/40 (2006.01); H01L 23/00 (2006.01); H01L 23/31 (2006.01);
U.S. Cl.
CPC ...
H01L 24/14 (2013.01); H01L 23/3157 (2013.01); H01L 24/06 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/06102 (2013.01); H01L 2224/1403 (2013.01); H01L 2224/1412 (2013.01); H01L 2224/14517 (2013.01);
Abstract

Disclosed is a MPS-C2 (Metal Post Soldering Chip Connection) semiconductor device having shorter supporting posts. Bonding pads are reentrant from a wafer-level packaging (WLP) layer formed on the active surface. A patterned UBM metal layer includes a plurality of UBM pads disposed on the bonding pads and at least a UBM island disposed on the WLP layer. The island area of the UBM island on the WLP layer is at least four times larger than the unit area of the UBM pads. A plurality of I/O pillars are one-to-one disposed on the UBM pads by plating and a plurality of supporting pillars are many-to-one disposed on the UBM island by one plating process. The unit footprint of the supporting pillars on the UBM island is smaller than the unit footprint of the I/O pillars on the UBM pads so as to compensate the height difference between the top jointing surfaces of the supporting pillars and the I/O pillars.


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