The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 04, 2015

Filed:

Dec. 06, 2013
Applicants:

Yonghoon Kim, Suwon-si, KR;

Keung Beum Kim, Hwaseong-si, KR;

Inho Choi, Seoul, KR;

Inventors:

Yonghoon Kim, Suwon-si, KR;

Keung Beum Kim, Hwaseong-si, KR;

Inho Choi, Seoul, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/02 (2006.01); H01L 25/065 (2006.01);
U.S. Cl.
CPC ...
H01L 25/0657 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48227 (2013.01); H01L 2224/73204 (2013.01); H01L 2224/73265 (2013.01); H01L 2924/15174 (2013.01); H01L 2924/15192 (2013.01); H01L 2924/15311 (2013.01);
Abstract

Provided is a stack-type semiconductor package comprising a first semiconductor package with a first package substrate and a logic chip mounted thereon, a second semiconductor package including a second package substrate disposed on the first semiconductor package and first and second memory chips stacked on the second package substrate, and connection pads disposed between the first and second package substrates to connect the first and second semiconductor packages electrically to each other. The first package substrate has first and second edges that are substantially perpendicular to each other. The first package substrate may include first DQ connection pads electrically connected to the first memory chip, and second DQ connection pads electrically connected to the second memory chip. The first DQ connection pads may be arranged adjacent to the first edge and the second DQ connection pads may be arranged adjacent to the second edge.


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