The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 04, 2015
Filed:
Nov. 10, 2011
Katsuo Yasuta, Tokyo, JP;
Yuji Miyagi, Tokyo, JP;
Katsuo Yasuta, Tokyo, JP;
Yuji Miyagi, Tokyo, JP;
KABUSHIKI KAISHA NIHON MICRONICS, Tokyo, JP;
Abstract
A plurality of chip stack devices having different external sizes can be tested accurately and efficiently with low cost. The present invention provides a chip stack device testing method testing a chip stack device configured by stacking a plurality of chips separated by dicing a substrate under test tested in a testing unit. A tray for chip stack devices having equal shape and external dimension to those of the undiced substrate under test is used, one or a plurality of the chip stack devices are attached and supported to an adhesive layer of the tray for chip stack devices to align the chip stack devices with positions of the respective chips of the undiced substrate under test, the tray for chip stack devices is installed in the testing unit in a similar manner to that in a test of the substrate under test, and the respective chip stack devices are tested.