The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 21, 2015

Filed:

May. 10, 2013
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Xiaozhu Kang, Fremont, CA (US);

Alpa T. Narendra Trivedi, Hillsboro, OR (US);

Siddhartha Chhabra, Hillsboro, OR (US);

Prashant Dewan, Hillsboro, OR (US);

Uday R. Savagaonkar, Portland, OR (US);

David M. Durham, Beaverton, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 21/60 (2013.01); G06F 21/78 (2013.01); G06F 21/50 (2013.01); G06F 12/14 (2006.01);
U.S. Cl.
CPC ...
G06F 21/60 (2013.01); G06F 21/50 (2013.01); G06F 21/78 (2013.01); G06F 12/14 (2013.01);
Abstract

The entry/exit architecture may be a critical component of a protection framework using a secure enclaves-like trust framework for coprocessors. The entry/exit architecture describes steps that may be used to switch securely into a trusted execution environment (entry architecture) and out of the trusted execution environment (exit architecture), at the same time preventing any secure information from leaking to an untrusted environment.


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