The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 14, 2015

Filed:

Jan. 08, 2014
Applicant:

Macronix International Co., Ltd., Hsinchu, TW;

Inventors:

Shih Yu Wang, Taipei, TW;

Yao-Wen Chang, Zhubei, TW;

Tao-Cheng Lu, Hsinchu, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/74 (2006.01); H01L 31/111 (2006.01); H01L 27/02 (2006.01); H01L 29/08 (2006.01);
U.S. Cl.
CPC ...
H01L 27/0262 (2013.01); H01L 29/0834 (2013.01); H01L 29/0839 (2013.01); H01L 29/0847 (2013.01);
Abstract

A semiconductor device includes a substrate, and first and second wells formed in the substrate. The first well has a first conductivity type. The second well has a second conductivity type different than the first conductivity type. The device includes a first heavily-doped region having the first conductivity type and a second heavily-doped region having the first conductivity type. A portion of the first heavily-doped region is formed in the first well. The second heavily-doped region is formed in the second well. The device also includes an insulating layer formed over a channel region of the substrate between the first and second heavily-doped regions, and a gate electrode formed over the insulating layer. The device further includes a terminal for coupling to a circuit being protected, and a switching circuit coupled between the terminal and the first heavily-doped region, and between the terminal and the gate electrode.


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