The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 14, 2015

Filed:

Jun. 07, 2013
Applicant:

Elite Semiconductor Memory Technology Inc., Hsinchu, TW;

Inventor:

Ya-Chun Lai, Changhua County, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 29/02 (2006.01); G11C 29/00 (2006.01); G11C 29/44 (2006.01);
U.S. Cl.
CPC ...
G11C 29/027 (2013.01); G11C 29/785 (2013.01); G11C 29/787 (2013.01); G11C 29/80 (2013.01); G11C 29/806 (2013.01); G11C 2029/4402 (2013.01);
Abstract

A redundancy evaluation circuit has (m+1) fuse boxes and a comparator, wherein the m fuse box output a fuse status address signal and the other one fuse box outputs a comparator enable signal. Each fuse box has a common stage circuit and k redundant cells. The k redundant cells shares the precharge transistor and an inverted latch of the common stage circuit, and the fuse in the selected redundant cell affects the output of the corresponding fuse box. The comparator enabled by the comparator enable signal compares the fuse status address signal and a defective element address signal to generate a redundancy enable signal. The redundancy evaluation circuit has a small layout area.


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