The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 07, 2015

Filed:

Dec. 21, 2006
Applicants:

Hasan Nejad, Boise, ID (US);

Thomas A. Figura, Boise, ID (US);

Gordon A. Haller, Boise, ID (US);

Ravi Iyer, Boise, ID (US);

John Mark Meldrim, Boise, ID (US);

Justin Harnish, Boise, ID (US);

Inventors:

Hasan Nejad, Boise, ID (US);

Thomas A. Figura, Boise, ID (US);

Gordon A. Haller, Boise, ID (US);

Ravi Iyer, Boise, ID (US);

John Mark Meldrim, Boise, ID (US);

Justin Harnish, Boise, ID (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 23/52 (2006.01); H01L 29/40 (2006.01); H01L 21/8238 (2006.01); H01L 21/28 (2006.01); H01L 21/8234 (2006.01); H01L 27/108 (2006.01); H01L 29/49 (2006.01); H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
H01L 21/823835 (2013.01); H01L 21/28097 (2013.01); H01L 21/823418 (2013.01); H01L 21/823443 (2013.01); H01L 21/823814 (2013.01); H01L 27/10852 (2013.01); H01L 27/10876 (2013.01); H01L 27/10897 (2013.01); H01L 29/4975 (2013.01); H01L 29/66621 (2013.01); H01L 2924/0002 (2013.01);
Abstract

Methods and structures are provided for full silicidation of recessed silicon. Silicon is provided within a trench. A mixture of metals is provided over the silicon in which one of the metals diffuses more readily in silicon than silicon does in the metal, and another of the metals diffuses less readily in silicon than silicon does in the metal. An exemplary mixture includes 80% nickel and 20% cobalt. The silicon within the trench is allowed to fully silicide without void formation, despite a relatively high aspect ratio for the trench. Among other devices, recessed access devices (RADs) can be formed by the method for memory arrays.


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