The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 07, 2015

Filed:

Feb. 05, 2009
Applicants:

Nicolas Bright, San Jose, CA (US);

David Hemker, San Jose, CA (US);

Fritz C. Redeker, Fremont, CA (US);

Yezdi Dordi, Palo Alto, CA (US);

Inventors:

Nicolas Bright, San Jose, CA (US);

David Hemker, San Jose, CA (US);

Fritz C. Redeker, Fremont, CA (US);

Yezdi Dordi, Palo Alto, CA (US);

Assignee:

Lam Research Corporation, Fremont, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/52 (2006.01); H01L 29/40 (2006.01); H01L 21/768 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76822 (2013.01); H01L 21/76805 (2013.01); H01L 21/76807 (2013.01); H01L 21/76816 (2013.01); H01L 21/76843 (2013.01); H01L 21/76846 (2013.01); H01L 21/76849 (2013.01); H01L 2924/0002 (2013.01);
Abstract

Back-End of Line (BEoL) interconnect structures, and methods for their manufacture, are provided. The structures are characterized by narrower conductive lines and reduced overall dielectric constant values. Conformal diffusion barrier layers, and selectively formed capping layers, are used to isolate the conductive lines and vias from surrounding dielectric layers in the interconnect structures. The methods of the invention employ techniques to narrow the openings in photoresist masks in order to define narrower vias. More narrow vias increase the amount of misalignment that can be tolerated between the vias and the conductive lines.


Find Patent Forward Citations

Loading…