The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 07, 2015

Filed:

May. 22, 2014
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Chiahsun Tseng, Wynantskill, NY (US);

Chun-chen Yeh, Clifton Park, NY (US);

Yunpeng Yin, Niskayuna, NY (US);

Lei L. Zhuang, White Plains, NY (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/311 (2006.01); H01L 21/336 (2006.01); H01L 21/306 (2006.01); H01L 21/308 (2006.01); H01L 21/033 (2006.01);
U.S. Cl.
CPC ...
H01L 21/30604 (2013.01); H01L 21/3086 (2013.01); H01L 21/0334 (2013.01); H01L 21/3085 (2013.01);
Abstract

A stack of a first hard mask portion and a second hard mask portion is formed over a semiconductor material layer by anisotropically etching a stack, from bottom to top, of a first hard mask layer and a second hard mask layer. The first hard mask portion is laterally recessed by an isotropic etch. A dielectric material layer is conformally deposited and planarized. The dielectric material layer is etched employing an anisotropic etch that is selective to the first hard mask portion to form a dielectric material portion that laterally surrounds the first hard mask portion. After removal of the second and first hard mask portions, the semiconductor material layer is etched employing the dielectric material portion as an etch mask. Optionally, portions of the semiconductor material layer underneath the first and second hard mask portions can be undercut at a periphery.


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