The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 07, 2015
Filed:
May. 31, 2011
Applicant:
A. Kent Porterfield, Lino Lakes, MN (US);
Inventor:
A. Kent Porterfield, Lino Lakes, MN (US);
Assignee:
Micron Technology, Inc., Boise, ID (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G11C 16/06 (2006.01); G11C 16/34 (2006.01); G06F 12/02 (2006.01);
U.S. Cl.
CPC ...
G11C 16/06 (2013.01); G11C 16/349 (2013.01); G06F 12/0246 (2013.01); G06F 2212/7202 (2013.01); G06F 2212/7208 (2013.01); Y02B 60/1225 (2013.01);
Abstract
Memory system controllers can include non-volatile memory control circuitry including a plurality of channel control circuits. Each of the plurality of channel control circuits can be configured to be coupled to a respective number of logical units (LUNs). Memory management circuitry can be coupled to the non-volatile memory control circuitry and configured to allocate a write block cluster for host writes based on an information width of a host bus and a protocol of the host bus. The write block cluster can include one block from fewer than all of the LUNs.