The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 07, 2015
Filed:
May. 14, 2013
Hong Kong Applied Science and Technology Research Institute Company Limited, Hong Kong, HK;
Yaofeng Sun, Hong Kong, HK;
Bin Xie, Hong Kong, HK;
Xunqing Shi, Hong Kong, HK;
Ou Dong, Hong Kong, HK;
Hong Kong Applied Science and Technology Research Institute Company Limited, Hong Kong Science Park, Shatin, New Territories, Hong Kong, CN;
Abstract
The presently claimed invention provides a method for optimizing an electrodeposition process of a plurality of vias in a wafer. Instead of simulating a large number of via on the wafer for via filling, a representative via is selected with the maximum value of critical factor, which is a function of process parameters. The filling of the representative via is simulated with different sampling points to find out the filling goodness in order to find out the optimized process windows of process parameters. An optimizer is also disclosed, which either provides sampling points or reduces sampling points under artificial neural network method. Calculation of filling goodness is used for evaluating via filling quality and further comparing among via fillings simulated at different sampling points. Consequently, the method of present invention is able to shorten the simulation time for via filling as well as provide a process window with high accuracy.