The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 30, 2015

Filed:

Sep. 09, 2014
Applicant:

Monolithic Power Systems, Inc., San Jose, CA (US);

Inventor:

Hunt Hang Jiang, Saratoga, CA (US);

Assignee:

Monolithic Power Systems, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/44 (2006.01); H01L 23/495 (2006.01); H01L 21/56 (2006.01); H01L 23/31 (2006.01); H01L 23/00 (2006.01); H01L 21/52 (2006.01); H01L 21/768 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49575 (2013.01); H01L 21/563 (2013.01); H01L 23/3107 (2013.01); H01L 23/49548 (2013.01); H01L 23/49572 (2013.01); H01L 23/49582 (2013.01); H01L 24/81 (2013.01); H01L 2224/73204 (2013.01); H01L 2924/01029 (2013.01); H01L 2924/0103 (2013.01); H01L 2924/01079 (2013.01); H01L 2924/01082 (2013.01); H01L 2924/01005 (2013.01); H01L 2924/01006 (2013.01); H01L 2924/01033 (2013.01); H01L 2924/01047 (2013.01); H01L 2924/0105 (2013.01); H01L 2924/014 (2013.01); H01L 2224/831 (2013.01); H01L 2224/16258 (2013.01); H01L 24/11 (2013.01); H01L 24/13 (2013.01); H01L 24/16 (2013.01); H01L 2224/11334 (2013.01); H01L 2224/1146 (2013.01); H01L 2224/11849 (2013.01); H01L 2224/131 (2013.01); H01L 2224/81191 (2013.01); H01L 2224/8121 (2013.01); H01L 2224/81439 (2013.01); H01L 2224/81455 (2013.01); H01L 2224/81815 (2013.01); H01L 2924/13091 (2013.01); H01L 2924/14 (2013.01); H01L 2224/13111 (2013.01); H01L 2224/13116 (2013.01); H01L 2224/13118 (2013.01); H01L 2224/13139 (2013.01); H01L 2224/13147 (2013.01); H01L 2224/32245 (2013.01); H01L 2224/81444 (2013.01); H01L 2224/81447 (2013.01); H01L 2224/92125 (2013.01); H01L 2924/13055 (2013.01); H01L 2924/13062 (2013.01); H01L 2924/3841 (2013.01); H01L 21/52 (2013.01); H01L 2924/1306 (2013.01); H01L 21/76885 (2013.01); H01L 23/4951 (2013.01); H01L 2924/1305 (2013.01);
Abstract

Processes of assembling microelectronic packages with lead frames and/or other suitable substrates are described herein. In one embodiment, a method for fabricating a semiconductor assembly includes forming an attachment area and a non-attachment area on a lead finger of a lead frame. The attachment area is more wettable to the solder ball than the non-attachment area during reflow. The method also includes contacting a solder ball carried by a semiconductor die with the attachment area of the lead finger, reflowing the solder ball while the solder ball is in contact with the attachment area of the lead finger, and controllably collapsing the solder ball to establish an electrical connection between the semiconductor die and the lead finger of the lead frame.


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