The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 30, 2015
Filed:
Nov. 05, 2013
Freescale Semiconductor, Inc., Austin, TX (US);
Rajesh Raina, Austin, TX (US);
Magdy S. Abadir, Austin, TX (US);
Darrell L. Carder, Dripping Springs, TX (US);
Freescale Semiconductor, Inc., Austin, TX (US);
Abstract
A circuit for efficiently testing digital shadow logic () in isolation from an associated non-logic design structure () includes a width and delay matched bypass circuit () coupled to receive an n-bit input from shadow logic () and to generate therefrom an m-bit test output which is selectively connected to replace an m-bit output to the shadow logic () from the non-logic design structure () in a shadow logic test mode, thereby flexibly emulating the non-logic design structure to allowing separate isolated tests on the shadow logic and on the non-logic design structure.