The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 23, 2015

Filed:

Feb. 06, 2013
Applicant:

Sumco Corporation, Tokyo, JP;

Inventors:

Hiroyuki Matsuyama, Tokyo, JP;

Chieko Takada, Tokyo, JP;

Junichi Matsuo, Tokyo, JP;

Hiroyuki Komatsu, Tokyo, JP;

Assignee:

SUMCO CORPORATION, Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/306 (2006.01); H01L 21/02 (2006.01); H01L 21/311 (2006.01);
U.S. Cl.
CPC ...
H01L 21/30604 (2013.01); H01L 21/02658 (2013.01); Y10T 428/24488 (2015.01); H01L 21/31116 (2013.01); H01L 21/31144 (2013.01);
Abstract

Disclosed is a method for removing an oxide film formed on a surface of a silicon wafer, comprising steps of: preparing a silicon wafer having an oxide film formed thereon; arranging a discoid wafer mounting stage, which has a contact portion with the oxide film being formed of an acid-resistant resin layer, in a reaction container of a vapor-phase etching apparatus; mounting the silicon wafer on the mounting stage in such a manner that a wafer center coincides with a central axis of the mounting stage; and circulating a hydrogen fluoride containing gas into the reaction container and removing the oxide film from an interface between a chamfered surface and a wafer lower surface toward the inner side of the wafer until a desired interval a is obtained, wherein the desired interval a is adjusted by changing a stage diameter of the mounting stage.


Find Patent Forward Citations

Loading…