The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 09, 2015

Filed:

Jul. 28, 2005
Applicants:

Ryosuke Watanabe, Kanagawa, JP;

Naoto Kusumoto, Kanagawa, JP;

Osamu Nakamura, Kanagawa, JP;

Inventors:

Ryosuke Watanabe, Kanagawa, JP;

Naoto Kusumoto, Kanagawa, JP;

Osamu Nakamura, Kanagawa, JP;

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/10 (2006.01); B29C 65/00 (2006.01); B32B 37/00 (2006.01); G06K 19/077 (2006.01); B32B 37/22 (2006.01); H01L 23/00 (2006.01); H01L 27/12 (2006.01);
U.S. Cl.
CPC ...
G06K 19/077 (2013.01); B32B 37/0053 (2013.01); B32B 37/226 (2013.01); B32B 2425/00 (2013.01); G06K 19/07718 (2013.01); H01L 24/86 (2013.01); H01L 27/1214 (2013.01); H01L 27/1266 (2013.01); H01L 2224/7965 (2013.01); H01L 2924/01002 (2013.01); H01L 2924/01004 (2013.01); H01L 2924/01005 (2013.01); H01L 2924/01013 (2013.01); H01L 2924/01015 (2013.01); H01L 2924/01027 (2013.01); H01L 2924/01029 (2013.01); H01L 2924/01033 (2013.01); H01L 2924/01042 (2013.01); H01L 2924/01049 (2013.01); H01L 2924/01056 (2013.01); H01L 2924/0106 (2013.01); H01L 2924/01073 (2013.01); H01L 2924/01074 (2013.01); H01L 2924/01079 (2013.01); H01L 2924/01082 (2013.01); H01L 2924/04953 (2013.01); H01L 2924/09701 (2013.01); H01L 2924/14 (2013.01); H01L 2924/19041 (2013.01); H01L 2924/01006 (2013.01); H01L 2924/01024 (2013.01); H01L 2924/01041 (2013.01);
Abstract

Thin film integrated circuits are peeled from a substrate and the peeled thin film integrated circuits are sealed, efficiently in order to improve manufacturing yields. The present invention provides laminating system comprising transporting means for transporting a substrate provided with a plurality of thin film integrated circuits; first peeling means for bonding first surfaces of the thin film integrated circuits to a first sheet member to peel the thin film integrated circuits from the substrate; second peeling means for bonding second surfaces of the thin film integrated circuits to a second sheet member to peel the thin film integrated circuits from the first sheet member; and sealing means for interposing the thin film integrated circuits between the second sheet member and a third sheet member to seal the thin film integrated circuit with the second sheet member and the third sheet member.


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