The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 02, 2015

Filed:

Jun. 28, 2012
Applicants:

Satish Krishnamoorthy, Folsom, CA (US);

Harishankar Sridharan, Fremont, CA (US);

Ritesh B. Trivedi, Folsom, CA (US);

Senthilkumar Ganapathy, Fair Oaks, CA (US);

Inventors:

Satish Krishnamoorthy, Folsom, CA (US);

Harishankar Sridharan, Fremont, CA (US);

Ritesh B. Trivedi, Folsom, CA (US);

Senthilkumar Ganapathy, Fair Oaks, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 7/00 (2006.01); H04L 27/00 (2006.01); H04L 25/03 (2006.01); G11C 7/22 (2006.01);
U.S. Cl.
CPC ...
H04L 27/00 (2013.01); G11C 7/22 (2013.01); H04L 25/03343 (2013.01);
Abstract

Disclosed embodiments may include a circuit having a clock-to-output (TCO) compensation circuit coupled to a RAM pull-up transmitter and a RAM pull-down transmitter. The TCO compensation circuit may be configured to compare a first output with a second output and to generate a delay code, based on the comparison, for at least one other RAM transmitter on the die to adjust a duty cycle of a third output associated with the at least one other RAM transmitter. Other embodiments may be disclosed.


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