The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 02, 2015
Filed:
Apr. 24, 2013
National Tsing Hua University, Hsinchu, TW;
NATIONAL TSING HUA UNIVERSITY, Hsinchu, TW;
Abstract
A layered decoding architecture with a reduced number of hardware buffers for low-density parity-check (LDPC) decoding by storing a variable-to-check message. When a check node begins a new operation, a variable-to-check message (Q) is added to a check-to-variable message (R) obtained in previous check-node operation to obtain an updated APP value. Then, the R value for the check node in the layer being processed is deducted from the APP value to obtain a variable-to-check message (Q). This variable-to-check message is stored in the memory and inserted into the check node equation to obtain a check-to-variable message. Finally the check-to-variable message obtained in this operation is stored to the check-to-variable message shift register to complete the updating operation for the check node and the variable node for the layer being processed. Improved hardware utilization and fewer buffers, thus achieving a smaller hardware area while retaining the converge speed, is obtained.