The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 02, 2015

Filed:

Nov. 13, 2012
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu, TW;

Inventors:

Qingchao Meng, Shanghai, CN;

Lei Pan, Shanghai, CN;

Shao-Yu Chou, Chu Pei, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02H 9/00 (2006.01); H02H 9/04 (2006.01); H01C 7/12 (2006.01); H02H 1/00 (2006.01); H02H 1/04 (2006.01); H02H 3/22 (2006.01); H02H 9/06 (2006.01);
U.S. Cl.
CPC ...
H02H 9/043 (2013.01); H02H 9/046 (2013.01);
Abstract

Some embodiments relate to an IC that includes an ESD-susceptible circuit. The IC includes a number of IC pads that are electrically coupled to respective nodes on the ESD-susceptible circuit. The IC pads are electrically accessible from external to the IC, and include one or more power supply pads and one or more I/O pads. The IC also includes a number of ESD protection devices coupled to the plurality of IC pads, respectively. A trigger circuit on the IC is configured to detect an ESD event impingent on a power supply pad and, in response to the detection, to trigger concurrent shunting of energy of the ESD event over both an ESD clamp element of an I/O pad and an ESD clamp element of the power supply pad. Other embodiments are also disclosed.


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