The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 02, 2015

Filed:

Jun. 25, 2014
Applicant:

Macronix International Co., Ltd., Hsinchu, TW;

Inventors:

Chih-Chieh Cheng, Hsinchu, TW;

Shih-Guei Yan, Hsinchu, TW;

Cheng-Hsien Cheng, Hsinchu, TW;

Wen-Jer Tsai, Hsinchu, TW;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/8247 (2006.01); H01L 29/66 (2006.01); H01L 29/423 (2006.01); H01L 29/788 (2006.01); H01L 29/792 (2006.01); H01L 27/115 (2006.01);
U.S. Cl.
CPC ...
H01L 29/66833 (2013.01); H01L 29/42332 (2013.01); H01L 29/42336 (2013.01); H01L 29/66825 (2013.01); H01L 29/7887 (2013.01); H01L 29/7923 (2013.01); H01L 27/11521 (2013.01); H01L 27/11568 (2013.01);
Abstract

A non-volatile memory and a manufacturing method thereof are provided. In this method, a first oxide layer having a protrusion is formed on a substrate. A pair of doped regions is formed in the substrate at two sides of the protrusion. A pair of charge storage spacers is formed on the sidewalls of the protrusion. A second oxide layer is formed on the first oxide layer and the pair of charge storage spacers. A conductive layer is formed on the second oxide layer, wherein the conductive layer is located completely on the top of the pair of charge storage spacers.


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