The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 02, 2015

Filed:

Jul. 11, 2014
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;

Inventors:

Thomas Merelle, Leuven, BE;

Gerben Doornbos, Leuven, BE;

Robert James Lander, Leuven, BE;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/088 (2006.01); H01L 21/336 (2006.01); H01L 21/8234 (2006.01); H01L 27/11 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01);
U.S. Cl.
CPC ...
H01L 27/0886 (2013.01); H01L 21/823418 (2013.01); H01L 21/823431 (2013.01); H01L 21/823437 (2013.01); H01L 27/088 (2013.01); H01L 27/11 (2013.01); H01L 27/1104 (2013.01); H01L 29/66795 (2013.01); H01L 29/785 (2013.01); H01L 29/66681 (2013.01); H01L 29/7817 (2013.01);
Abstract

A device and method of fabricating the same are disclosed. In an example, a device includes a first fin Field Effect Transistors (finFET) formed on a substrate. The first finFET including a fin formed on the substrate. The device further includes a second finFET formed on the substrate. The first finFET and the second finFET share the fin and wherein the first finFET is without any low density doped (LDD) extension region in the substrate and wherein the second FinFET is associated with a first LDD extension region formed in the substrate such that a drive strength of the second finFET is greater relative to a drive strength of the first finFET.


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