The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 26, 2015
Filed:
Oct. 30, 2009
Shabbir H. Batterywala, Bangalore, IN;
Sambuddha Bhattacharya, Bangalore, IN;
Subramanian Rajagopalan, Karnataka, IN;
Hi-keung Tony MA, Fremont, CA (US);
Shabbir H. Batterywala, Bangalore, IN;
Sambuddha Bhattacharya, Bangalore, IN;
Subramanian Rajagopalan, Karnataka, IN;
Hi-Keung Tony Ma, Fremont, CA (US);
SYNOPSYS, INC., Mountain View, CA (US);
Abstract
A layout-legalizing system modifies a portion of a circuit layout that is selected by a user to generate a modified portion that satisfies a set of technology constraints and a set of design constraints. The system receives as input the set of technology constraints which a semiconductor manufacturing foundry requires the circuit layout to satisfy for manufacturability purposes. The system also receives a set of design constraints from the user which restricts how objects in the portion of the circuit layout can be modified to satisfy the set of technology constraints. The system can further receive a selection input from the user which identifies the portion of the circuit layout which is to be legalized. The system then modifies the identified portion of the circuit layout to obtain a modified portion which satisfies the set of design constraints and at least a subset of the set of technology constraints.