The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 26, 2015

Filed:

Dec. 28, 2012
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Enric Herrero Abellanas, Cardedeu, ES;

Xavier Vera, Barcelona, ES;

Javier Carretero Casado, Barcelona, ES;

Tanausu Ramirez, Barcelona, ES;

Nicholas Axelos, Barcelona, ES;

Daniel Sanchez, L'Hospitalet de Llobregat, ES;

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/00 (2006.01);
U.S. Cl.
CPC ...
G06F 11/008 (2013.01);
Abstract

In one embodiment, a processor includes at least one functional block and banking logic. The banking logic may be to determine an average reliability metric associated with the at least one functional block. The banking logic may also be to, if the average reliability metric exceeds a required level, implement a reduced reliability mode in the at least one functional block, where the reduced reliability mode is associated with a reduction in the average reliability metric. Other embodiments are described and claimed.


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