The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 26, 2015

Filed:

Feb. 09, 2012
Applicants:

Vikram Iyengar, Pittsburgh, PA (US);

Animesh Khare, Bangalore, IN;

Kenneth Pichamuthu, Bellandur, IN;

Inventors:

Vikram Iyengar, Pittsburgh, PA (US);

Animesh Khare, Bangalore, IN;

Kenneth Pichamuthu, Bellandur, IN;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G01N 33/48 (2006.01); G01R 31/3185 (2006.01);
U.S. Cl.
CPC ...
G01R 31/318575 (2013.01);
Abstract

Aspects of the invention provide for reducing power consumption during manufacturing testing of an IC. In one embodiment, aspects of the invention include a method for reducing power consumption during a manufacturing test of an integrated circuit (IC), the method including: providing a plurality of domains, each domain associated with a clock phase; grouping, based on each domain, a first plurality of scan chains into a first test group; grouping, based on each domain, a second plurality of scan chains into a second test group, wherein the grouping of the first test group and of the second test group includes determining which domains can be tested simultaneously; and performing the manufacturing test of the IC.


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