The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 26, 2015
Filed:
Dec. 13, 2013
Zhi Qiang Niu, Santa Clara, CA (US);
Hamza Yilmaz, Saratoga, CA (US);
Jun LU, San Jose, CA (US);
Fei Wang, Cupertino, CA (US);
Zhi Qiang Niu, Santa Clara, CA (US);
Hamza Yilmaz, Saratoga, CA (US);
Jun Lu, San Jose, CA (US);
Fei Wang, Cupertino, CA (US);
Alpha & Omega Semiconductor, Inc., Sunnyvale, CA (US);
Abstract
The present invention relates generally to a semiconductor device and, more specifically, to optimizing the creep-age distance of the power semiconductor device and a preparation method thereof. The power semiconductor device includes a chip mounting unit with a die paddle and a plurality of leads arranged side by side located close to one side edge of the die paddle in a non-equidistant manner, a semiconductor chip attached on the die paddle, and a plastic packaging body covering the die paddle, the semiconductor chip, where the plastic packing body includes a plastic extension portion covering at least a part of a lead shoulder of a lead to obtain better electrical safety distance between the terminals of the semiconductor device, thus voltage creep-age distance of the device is increased.