The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 19, 2015
Filed:
May. 03, 2012
Akash Bansal, Santa Clara, CA (US);
Yohan U. Frans, Palo Alto, CA (US);
Kishore V. Kasamsetty, Cupertino, CA (US);
Todd Bystrom, Los Altos, CA (US);
Simon LI, Cupertino, CA (US);
Arun Vaidyanath, San Jose, CA (US);
Akash Bansal, Santa Clara, CA (US);
Yohan U. Frans, Palo Alto, CA (US);
Kishore V. Kasamsetty, Cupertino, CA (US);
Todd Bystrom, Los Altos, CA (US);
Simon Li, Cupertino, CA (US);
Arun Vaidyanath, San Jose, CA (US);
Rambus Inc., Sunnyvale, CA (US);
Abstract
The disclosed embodiments related to a clocked memory system which performs a calibration operation at a full-rate frequency to determine a full-rate calibration state that specifies a delay between a clock signal and a corresponding data signal in the clocked memory system. Next, the clocked memory system uses the full-rate calibration state to calculate a sub-rate calibration state, which is associated with a sub-rate frequency (e.g., 1/2, 1/4 or 1/8 of the full-rate frequency). The system then uses this sub-rate calibration state when the clocked memory system is operating at the sub-rate frequency. This calculation of the sub-rate state calibration states eliminates the need to perform an additional time-consuming calibration operation for each sub-rate.