Vertical resistance memory device and a read method thereof

Abstract

A read method of a vertical resistance memory device including resistance memory cells arranged in a three-dimensional array includes selecting a block from a plurality of blocks, applying a read voltage to a word line selected from word lines of the block, applying a sensing reference voltage to bit lines sharing the plurality of blocks, applying a string selection voltage to a string selection transistor through a string selection line selected from a plurality of string selection lines of the block, wherein the string selection line is connected to a gate of the string selection transistor; and determining a memory state of a memory cell selected from the plurality of resistance memory cells by the word line and the string selection line based on a current flowing through the memory cell, wherein the word line is connected through a corresponding horizontal electrode to the memory cell.