The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 12, 2015
Filed:
Jun. 05, 2013
Synopsys, Inc., Mountain View, CA (US);
Mayukh Bhattacharya, Palo Alto, CA (US);
Michal Jerzy Rewienski, Gdansk, PL;
Amelia Huimin Shen, Saratoga, CA (US);
Synopsys, Inc., Mountain View, CA (US);
Abstract
A method of asymmetric asynchronous decoupling of capacitors in an integrated circuit design is provided for faster simulation by circuit simulators, e.g. FastSPICE circuit simulators. This method includes removing a coupling capacitor from a list, which includes coupling capacitors that capacitively couple two nets in the design. The two nets have capacitances Cand C, and at least one of capacitances Cand Cexceeds a threshold. The coupling capacitor has capacitance Cc. When coupling capacitance Cc is low and only one of capacitances Cand Chas a low capacitance, then a forward capacitance can be used at whichever of the two nets has the low capacitance and a lump capacitance can be used at the other net for simulation. When coupling capacitance Cc is low and both of capacitances Cand Chave high capacitances, then lump capacitances can be used at the two nets for the simulation.