The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 12, 2015

Filed:

Sep. 23, 2012
Applicant:

Monolithic 3d Inc., San Jose, CA (US);

Inventors:

Zvi Or-Bach, San Jose, CA (US);

Deepak Sekar, San Jose, CA (US);

Brian Cronquist, San Jose, CA (US);

Paul Lim, Monte Sereno, CA (US);

Assignee:

Monolithic 3D Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/34 (2006.01); H01L 27/108 (2006.01); G11C 5/02 (2006.01); G11C 5/06 (2006.01); H01L 27/06 (2006.01); H01L 29/78 (2006.01); G11C 11/406 (2006.01); H01L 23/00 (2006.01); H01L 27/02 (2006.01);
U.S. Cl.
CPC ...
H01L 27/10873 (2013.01); G11C 5/025 (2013.01); G11C 5/063 (2013.01); H01L 27/0688 (2013.01); H01L 29/7841 (2013.01); H01L 27/10802 (2013.01); H01L 27/10894 (2013.01); H01L 27/10897 (2013.01); G11C 11/406 (2013.01); H01L 24/16 (2013.01); H01L 24/94 (2013.01); H01L 2224/16145 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/94 (2013.01); H01L 2225/06517 (2013.01); H01L 2924/10253 (2013.01); H01L 2924/1431 (2013.01); H01L 2924/1434 (2013.01); H01L 2225/06513 (2013.01); H01L 2225/06541 (2013.01); H01L 2225/06565 (2013.01); H01L 27/0203 (2013.01); H01L 29/785 (2013.01); G11C 2211/4016 (2013.01);
Abstract

A semiconductor device, including: a first semiconductor layer including first transistors, wherein the first transistors are interconnected by at least one metal layer including aluminum or copper; and a second mono-crystallized semiconductor layer including second transistors and overlaying the at least one metal layer, wherein the at least one metal layer is in-between the first semiconductor layer and the second mono-crystallized semiconductor layer, wherein the second mono-crystallized semiconductor layer is less than 100 nm in thickness, and wherein the second transistors include horizontally oriented transistors.


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