The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 12, 2015

Filed:

Sep. 28, 2012
Applicant:

Samsung Display Co., Ltd., Yongin, KR;

Inventors:

Ki-Hun Jeong, Cheonan-si, KR;

Woongkwon Kim, Cheonan-si, KR;

Jung Suk Bang, Guri-si, KR;

Daecheol Kim, Hwaseong-si, KR;

Sungryul Kim, Asan-si, KR;

ByeongHoon Cho, Seoul, KR;

Sungjin Mun, Seoul, KR;

Kun-Wook Han, Seongnam-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 31/00 (2006.01); H01L 33/48 (2010.01); H01L 33/00 (2010.01); G09G 3/00 (2006.01); G06F 3/041 (2006.01); G02F 1/133 (2006.01);
U.S. Cl.
CPC ...
H01L 33/48 (2013.01); H01L 33/005 (2013.01); G09G 3/00 (2013.01); G02F 2001/13312 (2013.01); G06F 2203/04103 (2013.01); G06F 3/0412 (2013.01);
Abstract

A display apparatus includes a first substrate including a plurality of pixels, and a second substrate facing the first substrate, the second substrate comprising a sensor area and a peripheral area, the sensor area comprising a plurality of sensors. The second substrate includes an insulating layer, and a plurality of lines disposed on the insulating layer corresponding to the peripheral area and connected to the sensors. A void is formed in the insulating layer between two adjacent lines of the plurality of lines at a boundary of the sensor area and the peripheral area.


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