The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 12, 2015
Filed:
May. 14, 2012
Zia Hossain, Tempe, AZ (US);
Gordon M. Grivna, Mesa, AZ (US);
Duane B. Barber, Portland, OR (US);
Peter Mcgrath, Portland, OR (US);
Balaji Padmanabhan, Tempe, AZ (US);
Prasad Venkatraman, Gilbert, AZ (US);
Zia Hossain, Tempe, AZ (US);
Gordon M. Grivna, Mesa, AZ (US);
Duane B. Barber, Portland, OR (US);
Peter McGrath, Portland, OR (US);
Balaji Padmanabhan, Tempe, AZ (US);
Prasad Venkatraman, Gilbert, AZ (US);
Semiconductor Components Industries, LLC, Phoenix, AZ (US);
Abstract
In one embodiment, a method for forming a semiconductor device includes forming trench and a dielectric layer along surfaces of the trench. A shield electrode is formed in a lower portion of the trench and the dielectric layer is removed from upper sidewall surfaces of the trench. A gate dielectric layer is formed along the upper surfaces of the trench. Oxidation-resistant spacers are formed along the gate dielectric layer. Thereafter, an interpoly dielectric layer is formed above the shield electrode using localized oxidation. The oxidation step increases the thickness of lower portions of the gate dielectric layer. The oxidation-resistant spacers are removed before forming a gate electrode adjacent the gate dielectric layer.