The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 12, 2015

Filed:

Sep. 08, 2011
Applicants:

Michiya Kohiki, Ibaraki, JP;

Terumasa Moriyama, Ibaraki, JP;

Inventors:

Michiya Kohiki, Ibaraki, JP;

Terumasa Moriyama, Ibaraki, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
B32B 15/20 (2006.01); H05K 3/02 (2006.01); H05K 3/38 (2006.01); H05K 1/09 (2006.01); H05K 3/06 (2006.01); C25D 1/04 (2006.01); C25D 3/38 (2006.01); C25D 5/10 (2006.01); C25D 5/12 (2006.01); C25D 5/16 (2006.01); C25D 7/06 (2006.01); C25D 11/38 (2006.01); C23C 18/16 (2006.01);
U.S. Cl.
CPC ...
H05K 3/022 (2013.01); Y10T 428/12549 (2015.01); Y10T 428/24355 (2015.01); Y10T 428/12431 (2015.01); H05K 3/38 (2013.01); H05K 1/09 (2013.01); H05K 3/06 (2013.01); C25D 1/04 (2013.01); C25D 3/38 (2013.01); C25D 5/10 (2013.01); C25D 5/12 (2013.01); C25D 5/16 (2013.01); C25D 7/0614 (2013.01); C25D 11/38 (2013.01); C23C 18/1651 (2013.01); Y10S 428/935 (2013.01);
Abstract

A copper foil for a printed wiring board, the copper foil being characterized by having, on at least one surface thereof, a roughed layer of the copper foil in which an average diameter at a particle root (D1) corresponding to a distance of 10% of a particle length from the root, is 0.2 μm to 1.0 μm, and a ratio of the particle length (L1) to the average diameter at the particle root (D1) is 15 or less when L1/D1. A copper foil for a printed wiring board, wherein a sum of area covered by holes on an uneven and roughened surface of a resin is 20% or more at a surface of the resin formed by laminating the resin and a copper foil for a printed wiring having a roughened layer and then removing the copper layer by etching. An object of the present invention is to develop a copper foil for a semiconductor package board in which the aforementioned phenomenon of circuit erosion is avoided without deteriorating other properties of the copper foil. In particular, an object of the present invention is to provide a copper foil for a printed wiring board and a producing method thereof, wherein a roughened layer of the copper foil can be improved to enhance the adhesiveness between the copper foil and a resin.


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