The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 05, 2015

Filed:

Oct. 20, 2009
Applicant:

Kuo H. Wu, Hsinchu, TW;

Inventor:

Kuo H. Wu, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06Q 10/06 (2012.01); G06Q 10/08 (2012.01); G06Q 10/10 (2012.01); G06Q 30/06 (2012.01); G06F 17/50 (2006.01); G06Q 20/10 (2012.01);
U.S. Cl.
CPC ...
G06F 17/5081 (2013.01); G06Q 10/101 (2013.01); G06Q 20/10 (2013.01);
Abstract

A method for manufacturing integrated circuits ('ICs') is disclosed. The method pertains to providing third-party technology in the form of an IC design library to foundry customers for designing IC products using alternate rule sets. Aggressive rules pertaining to IC layout are used to reduce device size, resulting in more device per wafer for the customer. The method includes a library creator creating a slim cell library, a slim cell library being provided to a customer to enable the customer to generate a slim IC design; an IC fabricator charging the customer a per-wafer premium to fabricate the slim IC design; the IC fabricator providing a first portion of the premium to a first entity, wherein the first entity is a contributor of technology for enabling creation of the slim cell library; and the IC fabricator providing a second portion of the premium to the library creator.


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