The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 05, 2015
Filed:
Dec. 29, 2010
Applicant:
Ming Fang, Plano, TX (US);
Inventor:
Ming Fang, Plano, TX (US);
Assignee:
STMicroelectronics, Inc., Coppell, TX (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/24 (2006.01); B41J 2/16 (2006.01); B81C 1/00 (2006.01); G01P 15/00 (2006.01);
U.S. Cl.
CPC ...
H01L 27/24 (2013.01); B41J 2/1601 (2013.01); B41J 2/1607 (2013.01); B41J 2/1626 (2013.01); B41J 2/1631 (2013.01); B41J 2/1632 (2013.01); B41J 2/1635 (2013.01); B41J 2/1639 (2013.01); B41J 2/1643 (2013.01); B81C 1/00246 (2013.01); G01P 15/00 (2013.01);
Abstract
A method of manufacturing double-sided semiconductor die by performing a first plurality of processes to a first side of a wafer and performing a second plurality of processes to a second side of the wafer, thereby forming at least a first semiconductor device on the first side of the wafer and at least a second semiconductor device on the second side of the wafer. The wafer may be cut to form a plurality of die having at least one semiconductor device on each side.
Quick Actions:
Fang, Ming. (2015). Double side wafer process, method and device (U.S. Patent No. 9024408). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9024408
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