The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 05, 2015

Filed:

Jun. 07, 2014
Applicant:

Monolithic 3d Inc., San Jose, CA (US);

Inventors:

Zvi Or-Bach, San Jose, CA (US);

Brian Cronquist, San Jose, CA (US);

Albert Karl Henning, Palo Alto, CA (US);

Assignee:

Monolithic 3D Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 21/8238 (2006.01); H01L 21/20 (2006.01); H01L 21/44 (2006.01); H01L 21/768 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76885 (2013.01);
Abstract

A method for processing a semiconductor device, the method including; providing a first semiconductor layer including first transistors; forming interconnection layers overlying the transistors, where the interconnection layers include copper or aluminum; forming a shielding heat conducting layer overlaying the interconnection layers; forming an isolation layer overlaying the shielding heat conducting layer; forming a second semiconductor layer overlying the isolation layer, and processing the second semiconductor layer at a temperature greater than about 400° C., where the interconnection layers are kept at a temperature below about 400° C.


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