The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 28, 2015

Filed:

Nov. 19, 2012
Applicant:

Grace Semiconductor Manufacturing Corporation, Shanghai, CN;

Inventors:

Hong Jiang, Shanghai, CN;

Yi Xu, Shanghai, CN;

Jun Xiao, Shanghai, CN;

Weiran Kong, Shanghai, CN;

Binghan Li, Shanghai, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 5/06 (2006.01); G11C 7/18 (2006.01); H01L 27/115 (2006.01); G11C 7/00 (2006.01); G11C 16/04 (2006.01); H01L 21/28 (2006.01);
U.S. Cl.
CPC ...
G11C 5/06 (2013.01); G11C 7/00 (2013.01); G11C 7/18 (2013.01); G11C 16/0416 (2013.01); H01L 21/28273 (2013.01); H01L 21/28282 (2013.01); H01L 27/11519 (2013.01); H01L 27/11565 (2013.01);
Abstract

A memory includes an array of memory cells including a plurality of memory cells with a common source, wherein each of the plurality of memory cells with a common source includes two sub-memory cells, each of the sub-memory cells corresponds to a bit line, and the respective bits are electrically independent. Each of the sub-memory cells in the memory according to the disclosure corresponds to a bit line, and the respective bit lines are electrically independent, thereby effectively avoiding interference to other memory cells which will not be programmed during a program operation.


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